Google Senior Design, Verification Engineer in Bengaluru, India
Bachelor's degree in Electrical Engineering, Computer Science or equivalent practical experience.
5 years of experience leading verification of digital systems using standard IP components/interconnects (microprocessor cores, hierarchical memory subsystems).
Experience leading verification of digital logic at RTL level using SystemVerilog or C/C++
Master's degree in Electrical Engineering or Computer Science with 3 years of relevant experience, or PhD in Electrical Engineering or Computer Science.
Experience with one or more Interconnect Protocols (eg. AHB, AXI, ACE, CHI, CCIX, CXL)
Experience with performance verification of SOCs, SystemC, pre-Silicon analysis and post-Silicon correlation
Architectural background in one or more (e.g., Interconnects, Caches Hierarchies, Coherency, Memory Consistency Models, Memory Ordering, DDR/LPDDR, PCIe, Packet Processors).
Experience with building verification methodologies that span simulation, emulation and FPGA prototypes
Experience in building and leading verification teams.
Our computational challenges are so big, complex and unique we can't just purchase off-the-shelf hardware, we've got to make it ourselves. Your team designs and builds the hardware, software and networking technologies that power all of Google's services. As a Hardware Engineer, you design and build the systems that are the heart of the world's largest and most powerful computing infrastructure. You develop from the lowest levels of circuit design to large system design and see those systems all the way through to high volume manufacturing. Your work has the potential to shape the machinery that goes into our cutting-edge data centers affecting millions of Google users.
With your technical expertise, you lead projects in multiple areas of expertise (i.e., engineering domains or systems) within a data center facility, including construction and equipment installation/troubleshooting/debugging with vendors.
In this role, you will work on the verification of the Google’s SOC offerings. You collaborate with hardware architects and design engineers for functional and performance verification of the interconnect, cache coherency and memory consistency. You also work on developing high performance VIPs for protocols supported by our interconnect, and closely collaborate in the deployment of the verification stack across a heterogeneous set of IPs.
Our approach to building interconnects is based on “scalability”. Your work will be verifying a generalized class of interconnects, and developing the associated methodologies and tools needed to solve the problem.
Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.
Define strategy, methodology and plan the verification of the next generation configurable interconnects and memory subsystems
Be the primary point of contact for IP DV and drive cross functional efforts with subsystem and SOC DV teams
Provide technical guidance to the team, coordinate verification efforts with IP architecture, design and software teams
Drive development of cross language tools and scalable verification methodologies
Close coverage measures to identify verification holes and to show progress towards tape-out.
Google is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also https://careers.google.com/eeo/ and https://careers.google.com/jobs/dist/legal/OFCCPEEOPost.pdf If you have a need that requires accommodation, please let us know by completing our Accommodations for Applicants form: https://goo.gl/forms/aBt6Pu71i1kzpLHe2.
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