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Job Description

In this role, you will collaborate with experts in various technology development sectors, EDA vendors, and product design teams. Your goal will be to develop and deliver top-quality industry-leading memory technology collaterals and to drive circuit innovations, to enable next generation high-performance, high-density, low-power embedded memory designs on Intel's advanced CMOS process technologies.

Your responsibilities will include, but may not limited to:

• Driving memory bitcell definition and peripheral circuit solutions on Intel's most advanced process technologies.

• Driving definition and implementation of design and construction rules for memory components and Macros.

• Leading memory libraries development and validation for Process Design Kit (PDK) releases.

• Pioneering layout automation on memory collaterals, arrays, and peripherals.

• Engaging in memory pathfinding activities and optimizing power, performance, and area (PPA) through design technology co-optimization (DTCO).

At Intel, Design Enablement is one of the key pillars enabling Intel to deliver winning products in the marketplace. Your work will directly enable Intel's internal and external customers to get to the market faster with products that include high-performance, high-density, low-power memory at the leading edge of the technology curve and implemented in Intel's advanced CMOS process technologies.

#DesignEnablement

Qualifications

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the requirements and are considered a plus factor in identifying top candidates.

Minimum Qualification:

Candidate must possess a MS degree with 3+ years of experience or PhD degree with 1+ years of experience in Electrical Engineering, Computer Engineering, Electrical and Computer Engineering, or a related discipline.

Experience above in the following:

• Custom circuit design, simulation, layout design, and verification.

• EDA tools used for digital and mixed-signal circuit design.

• Knowledge of memory bitcell and memory circuit design.

Preferred Qualifications:

Experience above in the following:

• CMOS process technology and device physics.

• Design, characterization, optimization and verification of memory circuits such as SRAM, Register Files, ROM, etc.

• Physical design / layout optimization on custom circuits

• Design rule and construction rule definition

• Design trade-off of power, performance, and area (PPA)

Inside this Business Group

As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore’s Law to bring smart, connected devices to every person on Earth.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here. (https://jobs.intel.com/en/benefits)

Working Model

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.