VetJobs - The Leading Military Job Board

Summary:

Meta is hiring Hardware Systems Engineers within the Infrastructure organization. We are looking for skilled engineers with experience in designing, building and testing advanced network components and systems. As a Hardware Systems Engineer, you will be part of a dynamic team working with the best in the industry, focused on developing innovative IP solutions for Meta’s data center applications. As a background, you should have hands-on experience within several of the following fields; advanced FPGA and/or ASIC design, random based design validation, assertion based or formal verification, high speed network IP design, AI systems, advanced FPGA tool flow, as well as a solid general hardware system design knowledge.As a team player, looking for new challenges, this is an opportunity to join our team and help us build some of the world’s most open, efficient and advanced AI platforms.

Required Skills:

Hardware Systems Engineer Responsibilities:

1. Specify, implement and verify FPGA/ASIC design blocks or verification components to meet the provided product requirements.

2. Debug and test designs running in SW/HW using various debug tools such as advanced FPGA implementation and debug tools, FW debuggers, SW framework and advanced test methods (random based verification, formal verification or assertion based verification).

3. Own and maintain IP design, Verification IP (VIP) or digital design test benches. Facilitate HW/SW integration into larger systems and lab experiments.

4. Adhere to team guidelines on best practices including use of Meta source control and participation in design reviews.

5. Produce detailed design and test documentation.

Minimum Qualifications:

Minimum Qualifications:

6. BS’s degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience

7. 4+ years hands on experience with advanced system development.

8. Experience with HW description Languages such as Verilog/System Verilog, VHDL, Universal Verification Methodology (UVM), C/C++, or Python.

Preferred Qualifications:

Preferred Qualifications:

9. Master’s degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience.

10. Experience with IP design and/or verification of high-speed IPs like PCIe, Ethernet or AXI bus.

11. Experience with System Verilog verification including class based testbench design such as UVM and constrained random testing.

12. Experience with scripted tool flows using Python, TCL or Bash.

13. Experience with embedded programming using C, C++, or Rust.

14. Knowledge of memory mapped bus interfaces (PCIe, AXI4, AHB, etc.).

15. Experience with Hardware EDA tools such as Vivado, Quartus, Synopsys VCS, Design Compiler or equivalent tools.

Industry: Internet