Job Information
Intel DFT Design Engineering Manager in San José, Costa Rica
Job Description
Directs and manages a team of Design for Test (DFT) engineers responsible for the design, verification, and integration of DFT features, capabilities, and test content. Oversees the definition and implementation of DFT architecture and microarchitecture, logic design and RTL coding for DFT features and blocks across IP/SoC, verification of components to achieve desired specifications, testing and debugging activities, and the integration of DFT blocks into functional IP and SoCs. Supports development of HVM test content for rapid bringup and ramp to production on automatic test equipment (ATE). Provides guidance to design and verification methodologies, processes, and procedures and continuously improves quality standards as well as power, performance, security, DPM, and area targets. Understands security milestones expectations are met as defined by the security development lifecycle. Responsible for enabling teams to execute through clear goal setting, facilitating work, maintaining accountability, applying differentiated performance management, and driving team results. Drives results by inspiring people, role modeling Intel values, developing the capabilities of others, and ensuring a productive work environment.
Qualifications
Minimum Qualifications:
Bachelor of Engineering degree or a Master of Science degree in Electronic, Electrical or Computer Engineering, or equivalent
5+ years of Experience in Unix/Linux and shell programming
5+ years of DFT or Test experience with Manufacturing
At least 3 years of Management or leadership experience, effective team building skills, engagement, development.
Advanced English level
Costa Rican unrestricted work permit.
Preferred Qualifications:
DFT Tools and Techniques
Digital Design Fundamentals, Logic/RTL design
Formal Equivalence Verification (FEV)
MCO/Timing/Clock Exceptions, SoC Clocking
Static Timing Analysis
Test Content Development
Experience in writing and producing SW code using TCL, Makefile.
Inside this Business Group
The Network & Edge Group brings together our network connectivity and edge into a business unit chartered to drive technology end to end product leadership. It's leadership Ethernet, Switch, IPU, Photonics, Network and Edge portfolio is comprised of leadership products critically important to our customers.
Posting Statement
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Benefits
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here. (https://jobs.intel.com/en/benefits)
Working Model
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.
Intel
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